The first open source version of the NeuroMem IP on FPGA is available and delivered as a Xilinx Vivado project along with a board support package file for the Digilent ARTY Z7 board. This IP core consist of a fixed number of 128 neurons interfaced to the AXI interface via SPI.

Subscription for Improvement and Knowledge Repository will be available soon. An Field Trainable Gate Area (FTGA) version optimized to reduce the footprint of the neurons will be released shortly.